University of Southampton: Southampton, Hampshire, GB

University of Southampton: Southampton, Hampshire, GB

The paper is available at the following link: PDF

Abstract:

Existing automatic generation methods for application-specific processors primarily enhance design metrics through instruction set extensions and customization. These approaches typically treat hardware architecture as a fixed entity, constraining the optimization space. We propose a new approach which adopts a global optimization perspective, collaboratively exploring interactions among algorithms, instructions, hardware architectures, and encoding to uncover a broader range of superior designs. Most state-of-the-art methods focus on utilizing High-Level Synthesis (HLS) to generate data for Design Space Exploration (DSE). Although HLS DSE can optimize designs locally, also - given enough data - using AI techniques, HLS DSE optimization generally suffers from low fidelity so alternative approaches are needed. We base our automation on automatic design generation, from assembly to RTL level, using multiple simulations and synthesis loops, with the objective of selecting processor designs optimized for size or power consumption. Unlike random design generation methods, our proposed method ensures that no resources are wasted on analysing functionally incorrect designs. We have implemented a simple case study, in which 40 different processor designs were automatically generated with extremely small sizes, by more than an order of magnitude smaller than state-of-the-art ultra-low power processors. The results show potential for automatic generation of large numbers of designs to provide data for further application-specific optimization.

Keywords:

Embedded processors, ultra-low power, application specific processors, automated synthesis, design space exploration, optimisation.

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